Power consumption within mobile embedded systems has become a major concern for many applications requiring high power autonomy between successive battery chargings. Most of the applications use a battery as power source and require periodic charging. In addition, according to the Internal Energy Agency (IAE) the world-wide power consumption of electronic gadgets will be in 2030 as high as today’s domestic consumption in America and Japan. There are nowadays many works and techniques that tend to reduce power consumption within embedded systems and/or communication objects: - In digital architectures, the different design flow levels are affected: middleware and real-time operating systems (RTOS) with the management of low-power modes, dynamic voltage and frequency scaling (DVFS), architecture-level approaches (e. g. clock gating, power gating), technological advances (e. g. Adaptative Body Bias, ABB). - The radio frequency (RF) blocks are optimized with respect to power consumption according to constraints relative to sensitivity, interference robustness and are based on new design methods. Advanced integrated components. Disruptive Digital-Analog partitioning is also a key point. - DC/DC, analog to digital (ADC), digital to analog (DAC) converters and other frequency dividers or synthesizers are also designed for optimal tradeoff between performance and power consumption. - Communication protocols are studied to get optimized energy per bit ratio (e. g. ZigBee or Bluetooth Low Energy). - Software layers can be developed with respect to available-power-dependent quality of service (QoS) accounting for power consumption (e. g. related to cache). It appears that all these techniques are generally developed without further analysis about the impact they have on each other. So we think that it is possible save a huge amount of energy if one uses a more global design approach. As example, IRISA has developed PowWow system with promising results compared to industrial standards targeting low power consumption. Furthermore, sensor network technologies and the increase efficiency of photovoltaic cells show that it is possible to reach communicating objects solutions with low enough power consumption to foresee the possibility of developing autonomous objects. In this frame, we propose to study the design of autonomous communicating object platform. This means that, within a given time period, the power consumption is lower than or equivalent to the energy the object can recover from its environment. The approach developed in GRECO (GREen wireless Communicating Objects) aims at reaching a global power optimization for a communicating object. This optimization will be based on a modeling of the performances and power consumption of the blocks that are required for the object design (RF blocks, converters, modem, peripherals, digital architecture, RTOS, software, power generator, battery) and the use of a global control (the Power Manager). These power models have to account for the element behavior (e. g. the efficiency) as the power is directly linked to the functioning states at any instant. This approach implies a diversity of the models that one should handle easily. The choice of modeling and simulation tools and techniques has to be considered for this purpose. The final validation will be done on various case studies, such as a monitoring system or audio communication between firemen. A material prototyping (e. g. based on an IRISA’s Pow-Wow extension) and a simulation study that would associate a precise modeling (virtual platform) of an object inserted in a network simulator-like environment could be of interest as demonstrators. Then, it should be possible at the end of the project, for a given power source and a target application, to evaluate the available/necessary power allocation for different parts of the autonomous communicating object.
