CIFAER

In various application domains emerging requirements leads to the definition of new architectures for electronic embedded systems, both for software and hardware parts. For example, in the automotive context, investigated solutions correspond to network of processing elements, distributed in the vehicle. Notably, these substructures should support multimedia applications, still delivering working fail safe and fault tolerance (for example, driving assistance using GPS or image processing …). Besides, condering the economical context, interoperable and easily updatable solutions should be proposed. One potential solution corresponds to the use of networks made of adaptable communication schemes, where each processing node could be reconfigured according to system behaviour. Thus, such targeted reconfigurable architectures should make possible to optimize processing execution and then match to functional requirements. System surety and fault tolerance should also be improved by defining an efficient management able to modify and adapt the network property during system execution. The research activity considered in the presented CIFAER project is about the definition of an innovative architecture, based on a new digital computing core (general purpose processor with reconfigurable architecture will be the processing node used for the flexible network, sized in order to satisfy throughput constraints and surety defined according to different working scenarios. Then, new services will be investigated for the definition of efficient software layers of the associated operating system. Besides, research will also be focused on the definition of new design methods to improve architecture sizing, taking into account the reconfiguration property. Industrial and universitary partners of the CIFAER project have special skills in the field of digital architectures, methodology for embedded system design, design of radio and powerline interface, and have experience in automotive and multimedia applications. Then, the aims of the project are closed to the "Architectures innovantes" and "Méthodologie pour la conception des architectures sur puce" themes considered in the call "Architecture du futur".